The present invention generally relates to digital signal decoding systems, and more particularly to a digital signal decoding system which decodes a digital signal by correcting a plurality of erroneous bits in each code word of the digital signal, which digital signal is encoded so that it is possible to correct one erroneous bit in each code word.
Conventionally, there is a transmission system which adds check bits to information bits to constitute code words and transmits through a transmission path a digital signal which is obtained by modulating the code words according to a self clock modulation system such as the biphase mark modulation system and the biphase space modulation system. According to the conventional transmission system, a decoding apparatus in the signal reception side demodulates the digital signal which is received through the transmission path, and performs error detection and error correction in order to decode the correct information bits (original data). When this conventional transmission system transmits a digital signal which is encoded so that it is possible to correct one erroneous bit in each code word, the decoding apparatus corrects one erroneous bit in an arbitrary code word even when one erroneous bit exists in the arbitrary code word, and it is possible to decode the correct information bits. However, when two or more erroneous bits exist in one code word, there are problems in that in some cases the decoding apparatus cannot decode the information bits and in some cases the probability of the decoding apparatus performing an erroneous decoding is high.